Engineering leadership in Aerospace & Defense.

1. 

   2020–present

   Northrop Grumman

   Senior Staff Chief Engineer & Technical Fellow

   Progressed through electrical lead, responsible engineer, payload chief engineer, and deputy chief engineer assignments.

   • Provide technical direction for complex Aerospace & Defense hardware programs, from requirements and interface definition through design reviews, integration, and verification.
   • Led system design for payload and reentry electronics, coordinating interfaces among customers, suppliers, vehicle elements, cable systems, and support equipment.
   • Direct design reviews, technical audits, root-cause actions, and technical-baseline decisions across electrical, software, manufacturing, safety, and electromagnetic compatibility disciplines.
2. 

   2014–2020

   Lockheed Martin Space

   Systems Engineer Staff, Project Engineer & New Programs Lead

   Assignments spanning systems sustainment, technical leadership development, modernization, and new program development.

   • Managed approximately $25 million in modernization programs for support equipment and infrastructure, aligning technical scope and project planning.
   • Served as a customer-facing technical liaison between the Air Force and engineering teams, coordinating field needs with multidisciplinary technical work.
   • Investigated flight-hardware and support-equipment anomalies using test plans, circuit schematics, and component analysis; participated in closed-loop failure analysis and the Material Review Board.
   • Developed technical approaches and proposals for new programs and internal research and development.
3. 

   2013–2014

   Northrop Grumman

   Field Engineer

   Factory and field support for aerospace hardware and test equipment.

   • Updated factory support equipment documentation and electrical and mechanical CAD records; addressed component obsolescence and replacement options.
   • Validated test equipment, supported fiber-optic gyro production requirements, and assisted environmental testing and flight-hardware troubleshooting.
4. 

   2010–2012

   Intel

   Signal Integrity Engineer

   High-speed processor-to-memory interfaces and DDR channel modeling.

   • Developed bus specifications and complete-channel SPICE/HSPICE models to assess signal-integrity margins and identify design issues.
   • Built 2D and 3D interconnect models and evaluated trace geometry, worst-case corners, and variation using simulation and Monte Carlo analysis.
   • Converted MATLAB analysis tools into C++ applications with a cross-platform graphical interface.
5. 

   2009–2015

   University of Utah

   Research, Teaching & STEM Outreach

   University appointments overlapped with degree study and industry work.

   • Conducted research in design automation, optimization, and thermal modeling for integrated optoelectronics.
   • Supported electrical engineering courses and laboratories in circuits, electromagnetics, signals and systems, optics, and CAD.
   • Mentored high school students and educators through NSF STEM outreach, using engineering demonstrations and short lectures to connect mathematics and science with applications.

1. 

   December 2026

   Degree conferral

   Ph.D., Electrical & Computer Engineering

   University of Utah

   Degree requirements completed

   Dissertation: SiPhACTS: Silicon Photonic Access, Calibration, and Test Synthesis

2. 

   2016

   M.S., Electrical & Computer Engineering

   University of Utah

   Thesis: Thermal Characterization Abstraction for Integrated Optoelectronics

3. 

   2012

   B.S., Electrical & Computer Engineering

   University of Utah

4. 

   2012

   B.S., Applied Mathematics

   University of Utah

5. 

   2009

   A.S., General Studies

   Utah Tech University

Explore my silicon photonics research, publications, and academic projects in Academics.